Emitter-follower: Lab 4.2

This lab covers the basics of the emitter-follower configuration of the BJT transistor.  The lab is based on the circuit in Student Manual for the Art of Electronics Lab 4-2. Note that the emitter-follower is also known as the common-collector.  The output is taken at the emitter, the input is provided at the base, and the voltage gain is roughly equal to one (Vemitter / Vin). Note that in this circuit, the input resistance is much smaller than the output resistance.  This is what the authors of the book decided on, but in most practical circuits the emitter-follower is used to bridge a high-impedance input to a lower impedance load.  According to Horrowitz and Hill, “…the emitter follower is useful for changing impedances of signals or loads.  To put it bluntly, that’s the whole point of the emitter follower.”

The following Spice model represents the circuit from the lab, and the Spice syntax is that of MacSpice.

* Emitter Follower Lab
Vcc 3 0 DC 15
Vin 1 0 SIN(0 5 60)
R1  1 2 270
R4  4 0 3.3k
Q1  3 2 4 generic
.model generic npn
.control
tran 1ms 60ms
plot v(1) v(4)
.endc
.end

The resulting output:  v(1) is the input and v(4) is the output at the emitter

The signal Vin at the base is expected to be the same at the emitter.  The amplitude of the signal on the emitter should be 0.6V different from the base signal due to the base-emitter junction voltage drop.  As shown above, the Vin is 5 V and the emitter amplitude is around 4.3 V.  However, when the signal swings below zero the output is clipped.  Why is that?

The reason is that when Vin swings below 0.6/0.7 V, the base-emitter voltage difference falls below the threshold and goes into to cutoff mode due to the reverse bias of the junction.  When the input voltage at the base rises above 0.6V again the transistor is enabled and passes the signal to the emitter.

One way to pass the negative part of the input signal is to have the input within the range of the trainsistors supply, Vcc – Ground (15 V – 0).  This can be done by having the input source centered around a DC offset greater than 5 V or by providing a bias network at the base of the transistor to bring the original signal up.  For simulating just modify the Spice model so that Vin is centered around 7.5 V DC rather than 0 V DC.  Just modify the first parameter of the SIN function as follows:

Vin 1 0 SIN(7.5 5 60)

The resulting output:  v(1) is the input and v(4) is the output at the emitter

Now the output looks like the input, minus the small voltage drop caused by the base-emitter junction.

The lab also asks us to hook up the emitter to a negative supply (-15V) instead of ground.  The SPICE model below presents just such a circuit.

* Emitter Follower Lab with Negative Supply Vee
Vcc 3 0 DC 15
Vee 0 5 DC 15
Vin 1 0 SIN(0 5 60)
R1  1 2 270
R4  4 5 3.3k
Q1  3 2 4 generic
.model generic npn
.control
tran 1ms 60ms
plot v(1) v(4)
.endc
.end

The resulting output:  v(1) is the input and v(4) is the output at the emitter

The output in this case is the same as the centered input.  The difference is that in practical circuits, one often doesn’t have control over the DC offset of the input signal.  In such cases, either a negative supply is needed to catch the negative swing of the input signal, or a bias network is needed at the base.  Such a bias network is reviewed in Lab 4.4.

Biased Emitter Follwer: Lab 4.4

Art of Electronics Student Manual Lab 4.4 presents a biased emitter-follower (common-collector) amplifier circuit with a single supply Vcc=+15V.  The amplifie5 is biased using Vcc and causes the input AC signal to oscillate around +6V rather than 0V.  By biasing the transistor, we make sure the input stays with the range of the active region of the transistor.

The purpose of this lab is to increase the peak-to-peak voltage of the input AC signal and observe the effects on the output signal as the the voltage swing is increased.  Before starting the lab, however, it is important to think about what might happen as the voltage increases.  If the voltage at the base is larger than than the voltage at the collector of the transistor, the collector-base junction should be forward biased.  If the voltage at the emitter is larger than the voltage at the base, the emitter-base junction should also be reversed, causing the output signal to be pulled to ground.

The MacSpice model for the circuit in the lab is as follows:

* Art of Electronics Lab 4.4
Vin 1 0 SIN(0 5 60)
C1 1 2 1u
R1 4 2 130k
R2 2 0 150k
Vcc 4 0 DC 15
Re  3 0 3.3k
Q1  4 2 3 generic
.model generic npn
.control
tran 1ms 60ms
plot v(1) v(4) v(3)
.endc
.end

Results:

For a 5V swing, the output is as follows: v(1) – input, v(4) – Vcc, V(3) – output

The 5V signal centered around 6 V produces a swing of 1v <= Vin <= 11 V, which is well within the 15V supply.  The output signal at the emitter resembles Vin, with the same phase and nearly the same amplitude, minus the base-emitter voltage drop of around 0.6~0.7V. Lets increase the voltage swing.

For a 10V swing, the output is as follows: v(1) – input, v(4) – Vcc, V(3) – output

The voltage swing in this circuit is -4V <= Vin <= 16 V minus the base-emitter junction voltage drop.  Notice the clipping in this circuit, particularly when Vin < 0V, the output clips because the base-emitter junction is reversed biased and the transistor goes into cutoff mode.  Essentialy, when Vbase – Vemitter < 0.6/0.7 V, the transistor shuts off.  For this circuit, the input is centered around ground, and the bias brings it up to 6V.  Were it not for the bias, the input signal would be clipped at the output for all of the negative cycle of the input signal.  As we can see, when the base-emitter junction is reverse biases, it pulls the output voltage at the emitter through R3 to its rail, in this case ground.  Lets increase the swing again.

For a 15V swing, the output is as follows: v(1) – input, v(4) – Vcc, V(3) – output

Notice the clipping is extreme in the negative cycle, but it is also present at the peak of the positive cycle of Vin.  In the positive cycle, when Vbase > Vcollector + 0.6/0.7 V, the junction is becomes forward-biased and the output cannot swing above the collector, which is fixed at the supply (Vcc).

So what does this lab help us understand?  The lab shows that when using the emitter follower, we must design the amplifier output to fall within the limit of the positive supply (Vcc) as well as the emitter termination.  We can use a bias network and a single supply (Vcc) to center our input signal within the range of the amplifier.  We must be mindful of the input range, always!

Getting Started with Electronics

So while my FPGA series is paused, I have decided to try to take a new direction (again).  I start my Master’s degree in Electrical Engineering next week, and I have two demons two face. I am determined that I will defeat these demons this time.

My first demon is electromagnetics, which I plan to challenge again in the near future.  I originally took the course over seven weeks during the summer, alongside with chemistry and another course.  As a result, in such a shot time I could not focus solely on electromagnetics, and being as stupid as I am, I really could not wrap my head around the subject.  None of the chapters connected and I was really lost.  Once I entered the workforce and started working in an antenna research division of a company, I understood the broad aspects very well.  Now that I understand the RF world, S-parameters, and antenna fundamentals, I would like to go back and challenge Maxwell’s equations, TEM modes, and all of the other stuff that I just could not understand as an undergraduate.

My second demon is analog electronics.  During my undergraduate degree, I had to take an electronics course that turned out to be a nightmare.  Though I did perfectly well in the laboratory portion, I did not fair so well in the lecture portion of the course.  I attribute this to the fact that I was too distracted by the mathematics and silly models to see the big picture.  Also it did not help that the course was taught by a physicist who was more interested in the physics of transistors than their application.  As a result of this course, I steered myself towards digital electronics rather than analog electronics.  It was not until I started my career that I would understand how simple transistors can be utilized in circuits.

Even after starting my career, I worked strictly in the digital domain, so the only raw transistors I used were digital transistors used for switching ICs on and off.  Of course the ICs, ASICs and FPGAs I used were powered by MOSFETs, but they were abstracted away from me.

I want to understand BJTs and FETs better, especially in the analog domain of amplification rather than switching.  I cannot afford to set up an electronics lab with function generators and oscilloscopes, so I will instead use a SPICE simulator.  With a textbook (Art of Electronics), simple analog circuits and SPICE output, I hope to get a better understanding of how analog circuits work.  I will post the SPICE models, schematics, and the output of my lab experiments so that I can make sure I understand everything and also share what I have learned.